24 lines
785 B
Plaintext
24 lines
785 B
Plaintext
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/* See Rust for a more complete reference: https://github.com/rp-rs/rp-hal/blob/main/rp235x-hal-examples/memory.x */
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MEMORY
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{
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/* 2MiB safe default. */
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FLASH : ORIGIN = 0x10000000, LENGTH = __flash_size
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/* RAM consists of 8 banks, SRAM0..SRAM7 with striped mapping. */
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SRAM : ORIGIN = 0x20000000, LENGTH = 512k
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/* Banks 8 and 9 use direct mapping which can be
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specailized for applications where predictable access time is beneficial.
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i.e: Separate stacks for core0 and core1. */
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SRAM4 : ORIGIN = 0x20080000, LENGTH = 4k
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SRAM5 : ORIGIN = 0x20081000, LENGTH = 4k
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FLASH_TEXT (rx) : ORIGIN = 0x10000000, LENGTH = __flash_size
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RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 512k
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}
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_stack_size = 2K;
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SECTIONS
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{
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}
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INCLUDE "targets/arm.ld"
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