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add tinygo device files

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This commit is contained in:
Li Jie
2025-08-20 10:27:01 +08:00
parent 1b8b500fd7
commit 246278ff80
787 changed files with 85978 additions and 55 deletions
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12
targets/device/nrf/README.markdown Normal file
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# Generated Go files for Nordic Semiconductors devices
In this directory, Go register description files are stored that are generated
by `gen-device.py` from .svd files provided by Nordic. See the SVD files [over
here](https://github.com/NordicSemiconductor/nrfx/tree/master/mdk).
The original files are provided under the 3-clause BSD license, see [this
post](https://devzone.nordicsemi.com/b/blog/posts/introducing-nordics-new-software-licensing-schemes)
for details. As the generated files transform most of the original file, I think
they should be licensed under the same license as the original files. Generated
files will contain the license statement that is included in the original SVD
files.

153
targets/device/nrf/nrf51.s Normal file
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// Automatically generated file. DO NOT EDIT.
// Generated by gen-device-svd.go from nrf51.svd, see https://github.com/NordicSemiconductor/nrfx/tree/master/mdk
/*
// nRF51 reference description for radio MCU with ARM 32-bit Cortex-M0 Microcontroller at 16MHz CPU clock
*/
// Copyright (c) 2010 - 2020, Nordic Semiconductor ASA All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice, this
// list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of Nordic Semiconductor ASA nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
.syntax unified
// This is the default handler for interrupts, if triggered but not defined.
.section .text.Default_Handler
.global Default_Handler
.type Default_Handler, %function
Default_Handler:
wfe
b Default_Handler
.size Default_Handler, .-Default_Handler
// Avoid the need for repeated .weak and .set instructions.
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
// Must set the "a" flag on the section:
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
.section .isr_vector, "a", %progbits
.global __isr_vector
__isr_vector:
// Interrupt vector as defined by Cortex-M, starting with the stack top.
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
// _stack_top and Reset_Handler.
.long _stack_top
.long Reset_Handler
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long 0
.long 0
.long 0
.long 0
.long SVC_Handler
.long DebugMon_Handler
.long 0
.long PendSV_Handler
.long SysTick_Handler
// Extra interrupts for peripherals defined by the hardware vendor.
.long POWER_CLOCK_IRQHandler
.long RADIO_IRQHandler
.long UART0_IRQHandler
.long SPI0_TWI0_IRQHandler
.long SPI1_TWI1_IRQHandler
.long 0
.long GPIOTE_IRQHandler
.long ADC_IRQHandler
.long TIMER0_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long RTC0_IRQHandler
.long TEMP_IRQHandler
.long RNG_IRQHandler
.long ECB_IRQHandler
.long CCM_AAR_IRQHandler
.long WDT_IRQHandler
.long RTC1_IRQHandler
.long QDEC_IRQHandler
.long LPCOMP_IRQHandler
.long SWI0_IRQHandler
.long SWI1_IRQHandler
.long SWI2_IRQHandler
.long SWI3_IRQHandler
.long SWI4_IRQHandler
.long SWI5_IRQHandler
// Define default implementations for interrupts, redirecting to
// Default_Handler when not implemented.
IRQ NMI_Handler
IRQ HardFault_Handler
IRQ MemoryManagement_Handler
IRQ BusFault_Handler
IRQ UsageFault_Handler
IRQ SVC_Handler
IRQ DebugMon_Handler
IRQ PendSV_Handler
IRQ SysTick_Handler
IRQ POWER_CLOCK_IRQHandler
IRQ POWER_IRQHandler
IRQ CLOCK_IRQHandler
IRQ RADIO_IRQHandler
IRQ UART0_IRQHandler
IRQ SPI0_TWI0_IRQHandler
IRQ SPI0_IRQHandler
IRQ TWI0_IRQHandler
IRQ SPI1_TWI1_IRQHandler
IRQ SPIS1_IRQHandler
IRQ SPI1_IRQHandler
IRQ TWI1_IRQHandler
IRQ GPIOTE_IRQHandler
IRQ ADC_IRQHandler
IRQ TIMER0_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER2_IRQHandler
IRQ RTC0_IRQHandler
IRQ TEMP_IRQHandler
IRQ RNG_IRQHandler
IRQ ECB_IRQHandler
IRQ CCM_AAR_IRQHandler
IRQ AAR_IRQHandler
IRQ CCM_IRQHandler
IRQ WDT_IRQHandler
IRQ RTC1_IRQHandler
IRQ QDEC_IRQHandler
IRQ LPCOMP_IRQHandler
IRQ SWI0_IRQHandler
IRQ SWI1_IRQHandler
IRQ SWI2_IRQHandler
IRQ SWI3_IRQHandler
IRQ SWI4_IRQHandler
IRQ SWI5_IRQHandler
.size __isr_vector, .-__isr_vector

204
targets/device/nrf/nrf52.s Normal file
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// Automatically generated file. DO NOT EDIT.
// Generated by gen-device-svd.go from nrf52.svd, see https://github.com/NordicSemiconductor/nrfx/tree/master/mdk
/*
// nRF52832 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller
*/
// Copyright (c) 2010 - 2020, Nordic Semiconductor ASA All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice, this
// list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of Nordic Semiconductor ASA nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
.syntax unified
// This is the default handler for interrupts, if triggered but not defined.
.section .text.Default_Handler
.global Default_Handler
.type Default_Handler, %function
Default_Handler:
wfe
b Default_Handler
.size Default_Handler, .-Default_Handler
// Avoid the need for repeated .weak and .set instructions.
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
// Must set the "a" flag on the section:
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
.section .isr_vector, "a", %progbits
.global __isr_vector
__isr_vector:
// Interrupt vector as defined by Cortex-M, starting with the stack top.
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
// _stack_top and Reset_Handler.
.long _stack_top
.long Reset_Handler
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long 0
.long 0
.long 0
.long 0
.long SVC_Handler
.long DebugMon_Handler
.long 0
.long PendSV_Handler
.long SysTick_Handler
// Extra interrupts for peripherals defined by the hardware vendor.
.long POWER_CLOCK_IRQHandler
.long RADIO_IRQHandler
.long UARTE0_UART0_IRQHandler
.long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
.long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
.long NFCT_IRQHandler
.long GPIOTE_IRQHandler
.long SAADC_IRQHandler
.long TIMER0_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long RTC0_IRQHandler
.long TEMP_IRQHandler
.long RNG_IRQHandler
.long ECB_IRQHandler
.long CCM_AAR_IRQHandler
.long WDT_IRQHandler
.long RTC1_IRQHandler
.long QDEC_IRQHandler
.long COMP_LPCOMP_IRQHandler
.long SWI0_EGU0_IRQHandler
.long SWI1_EGU1_IRQHandler
.long SWI2_EGU2_IRQHandler
.long SWI3_EGU3_IRQHandler
.long SWI4_EGU4_IRQHandler
.long SWI5_EGU5_IRQHandler
.long TIMER3_IRQHandler
.long TIMER4_IRQHandler
.long PWM0_IRQHandler
.long PDM_IRQHandler
.long 0
.long 0
.long MWU_IRQHandler
.long PWM1_IRQHandler
.long PWM2_IRQHandler
.long SPIM2_SPIS2_SPI2_IRQHandler
.long RTC2_IRQHandler
.long I2S_IRQHandler
.long FPU_IRQHandler
// Define default implementations for interrupts, redirecting to
// Default_Handler when not implemented.
IRQ NMI_Handler
IRQ HardFault_Handler
IRQ MemoryManagement_Handler
IRQ BusFault_Handler
IRQ UsageFault_Handler
IRQ SVC_Handler
IRQ DebugMon_Handler
IRQ PendSV_Handler
IRQ SysTick_Handler
IRQ POWER_CLOCK_IRQHandler
IRQ POWER_IRQHandler
IRQ CLOCK_IRQHandler
IRQ RADIO_IRQHandler
IRQ UARTE0_UART0_IRQHandler
IRQ UARTE0_IRQHandler
IRQ UART0_IRQHandler
IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
IRQ SPIM0_IRQHandler
IRQ SPIS0_IRQHandler
IRQ TWIM0_IRQHandler
IRQ TWIS0_IRQHandler
IRQ SPI0_IRQHandler
IRQ TWI0_IRQHandler
IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
IRQ SPIM1_IRQHandler
IRQ SPIS1_IRQHandler
IRQ TWIM1_IRQHandler
IRQ TWIS1_IRQHandler
IRQ SPI1_IRQHandler
IRQ TWI1_IRQHandler
IRQ NFCT_IRQHandler
IRQ GPIOTE_IRQHandler
IRQ SAADC_IRQHandler
IRQ TIMER0_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER2_IRQHandler
IRQ RTC0_IRQHandler
IRQ TEMP_IRQHandler
IRQ RNG_IRQHandler
IRQ ECB_IRQHandler
IRQ CCM_AAR_IRQHandler
IRQ CCM_IRQHandler
IRQ AAR_IRQHandler
IRQ WDT_IRQHandler
IRQ RTC1_IRQHandler
IRQ QDEC_IRQHandler
IRQ COMP_LPCOMP_IRQHandler
IRQ COMP_IRQHandler
IRQ LPCOMP_IRQHandler
IRQ SWI0_EGU0_IRQHandler
IRQ SWI0_IRQHandler
IRQ EGU0_IRQHandler
IRQ SWI1_EGU1_IRQHandler
IRQ SWI1_IRQHandler
IRQ EGU1_IRQHandler
IRQ SWI2_EGU2_IRQHandler
IRQ SWI2_IRQHandler
IRQ EGU2_IRQHandler
IRQ SWI3_EGU3_IRQHandler
IRQ SWI3_IRQHandler
IRQ EGU3_IRQHandler
IRQ SWI4_EGU4_IRQHandler
IRQ SWI4_IRQHandler
IRQ EGU4_IRQHandler
IRQ SWI5_EGU5_IRQHandler
IRQ SWI5_IRQHandler
IRQ EGU5_IRQHandler
IRQ TIMER3_IRQHandler
IRQ TIMER4_IRQHandler
IRQ PWM0_IRQHandler
IRQ PDM_IRQHandler
IRQ MWU_IRQHandler
IRQ PWM1_IRQHandler
IRQ PWM2_IRQHandler
IRQ SPIM2_SPIS2_SPI2_IRQHandler
IRQ SPIM2_IRQHandler
IRQ SPIS2_IRQHandler
IRQ SPI2_IRQHandler
IRQ RTC2_IRQHandler
IRQ I2S_IRQHandler
IRQ FPU_IRQHandler
.size __isr_vector, .-__isr_vector

159
targets/device/nrf/nrf52805.s Normal file
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// Automatically generated file. DO NOT EDIT.
// Generated by gen-device-svd.go from nrf52805.svd, see https://github.com/NordicSemiconductor/nrfx/tree/master/mdk
/*
// nRF52805 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller
*/
// Copyright (c) 2010 - 2020, Nordic Semiconductor ASA All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice, this
// list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of Nordic Semiconductor ASA nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
.syntax unified
// This is the default handler for interrupts, if triggered but not defined.
.section .text.Default_Handler
.global Default_Handler
.type Default_Handler, %function
Default_Handler:
wfe
b Default_Handler
.size Default_Handler, .-Default_Handler
// Avoid the need for repeated .weak and .set instructions.
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
// Must set the "a" flag on the section:
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
.section .isr_vector, "a", %progbits
.global __isr_vector
__isr_vector:
// Interrupt vector as defined by Cortex-M, starting with the stack top.
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
// _stack_top and Reset_Handler.
.long _stack_top
.long Reset_Handler
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long 0
.long 0
.long 0
.long 0
.long SVC_Handler
.long DebugMon_Handler
.long 0
.long PendSV_Handler
.long SysTick_Handler
// Extra interrupts for peripherals defined by the hardware vendor.
.long POWER_CLOCK_IRQHandler
.long RADIO_IRQHandler
.long UARTE0_UART0_IRQHandler
.long TWIM0_TWIS0_TWI0_IRQHandler
.long SPIM0_SPIS0_SPI0_IRQHandler
.long 0
.long GPIOTE_IRQHandler
.long SAADC_IRQHandler
.long TIMER0_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long RTC0_IRQHandler
.long TEMP_IRQHandler
.long RNG_IRQHandler
.long ECB_IRQHandler
.long CCM_AAR_IRQHandler
.long WDT_IRQHandler
.long RTC1_IRQHandler
.long QDEC_IRQHandler
.long 0
.long SWI0_EGU0_IRQHandler
.long SWI1_EGU1_IRQHandler
.long SWI2_IRQHandler
.long SWI3_IRQHandler
.long SWI4_IRQHandler
.long SWI5_IRQHandler
// Define default implementations for interrupts, redirecting to
// Default_Handler when not implemented.
IRQ NMI_Handler
IRQ HardFault_Handler
IRQ MemoryManagement_Handler
IRQ BusFault_Handler
IRQ UsageFault_Handler
IRQ SVC_Handler
IRQ DebugMon_Handler
IRQ PendSV_Handler
IRQ SysTick_Handler
IRQ POWER_CLOCK_IRQHandler
IRQ CLOCK_IRQHandler
IRQ POWER_IRQHandler
IRQ RADIO_IRQHandler
IRQ UARTE0_UART0_IRQHandler
IRQ UART0_IRQHandler
IRQ UARTE0_IRQHandler
IRQ TWIM0_TWIS0_TWI0_IRQHandler
IRQ TWI0_IRQHandler
IRQ TWIM0_IRQHandler
IRQ TWIS0_IRQHandler
IRQ SPIM0_SPIS0_SPI0_IRQHandler
IRQ SPI0_IRQHandler
IRQ SPIM0_IRQHandler
IRQ SPIS0_IRQHandler
IRQ GPIOTE_IRQHandler
IRQ SAADC_IRQHandler
IRQ TIMER0_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER2_IRQHandler
IRQ RTC0_IRQHandler
IRQ TEMP_IRQHandler
IRQ RNG_IRQHandler
IRQ ECB_IRQHandler
IRQ CCM_AAR_IRQHandler
IRQ AAR_IRQHandler
IRQ CCM_IRQHandler
IRQ WDT_IRQHandler
IRQ RTC1_IRQHandler
IRQ QDEC_IRQHandler
IRQ SWI0_EGU0_IRQHandler
IRQ EGU0_IRQHandler
IRQ SWI0_IRQHandler
IRQ SWI1_EGU1_IRQHandler
IRQ EGU1_IRQHandler
IRQ SWI1_IRQHandler
IRQ SWI2_IRQHandler
IRQ SWI3_IRQHandler
IRQ SWI4_IRQHandler
IRQ SWI5_IRQHandler
.size __isr_vector, .-__isr_vector

166
targets/device/nrf/nrf52810.s Normal file
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// Automatically generated file. DO NOT EDIT.
// Generated by gen-device-svd.go from nrf52810.svd, see https://github.com/NordicSemiconductor/nrfx/tree/master/mdk
/*
// nRF52810 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller
*/
// Copyright (c) 2010 - 2020, Nordic Semiconductor ASA All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice, this
// list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of Nordic Semiconductor ASA nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
.syntax unified
// This is the default handler for interrupts, if triggered but not defined.
.section .text.Default_Handler
.global Default_Handler
.type Default_Handler, %function
Default_Handler:
wfe
b Default_Handler
.size Default_Handler, .-Default_Handler
// Avoid the need for repeated .weak and .set instructions.
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
// Must set the "a" flag on the section:
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
.section .isr_vector, "a", %progbits
.global __isr_vector
__isr_vector:
// Interrupt vector as defined by Cortex-M, starting with the stack top.
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
// _stack_top and Reset_Handler.
.long _stack_top
.long Reset_Handler
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long 0
.long 0
.long 0
.long 0
.long SVC_Handler
.long DebugMon_Handler
.long 0
.long PendSV_Handler
.long SysTick_Handler
// Extra interrupts for peripherals defined by the hardware vendor.
.long POWER_CLOCK_IRQHandler
.long RADIO_IRQHandler
.long UARTE0_UART0_IRQHandler
.long TWIM0_TWIS0_TWI0_IRQHandler
.long SPIM0_SPIS0_SPI0_IRQHandler
.long 0
.long GPIOTE_IRQHandler
.long SAADC_IRQHandler
.long TIMER0_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long RTC0_IRQHandler
.long TEMP_IRQHandler
.long RNG_IRQHandler
.long ECB_IRQHandler
.long CCM_AAR_IRQHandler
.long WDT_IRQHandler
.long RTC1_IRQHandler
.long QDEC_IRQHandler
.long COMP_IRQHandler
.long SWI0_EGU0_IRQHandler
.long SWI1_EGU1_IRQHandler
.long SWI2_IRQHandler
.long SWI3_IRQHandler
.long SWI4_IRQHandler
.long SWI5_IRQHandler
.long 0
.long 0
.long PWM0_IRQHandler
.long PDM_IRQHandler
// Define default implementations for interrupts, redirecting to
// Default_Handler when not implemented.
IRQ NMI_Handler
IRQ HardFault_Handler
IRQ MemoryManagement_Handler
IRQ BusFault_Handler
IRQ UsageFault_Handler
IRQ SVC_Handler
IRQ DebugMon_Handler
IRQ PendSV_Handler
IRQ SysTick_Handler
IRQ POWER_CLOCK_IRQHandler
IRQ CLOCK_IRQHandler
IRQ POWER_IRQHandler
IRQ RADIO_IRQHandler
IRQ UARTE0_UART0_IRQHandler
IRQ UART0_IRQHandler
IRQ UARTE0_IRQHandler
IRQ TWIM0_TWIS0_TWI0_IRQHandler
IRQ TWI0_IRQHandler
IRQ TWIM0_IRQHandler
IRQ TWIS0_IRQHandler
IRQ SPIM0_SPIS0_SPI0_IRQHandler
IRQ SPI0_IRQHandler
IRQ SPIM0_IRQHandler
IRQ SPIS0_IRQHandler
IRQ GPIOTE_IRQHandler
IRQ SAADC_IRQHandler
IRQ TIMER0_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER2_IRQHandler
IRQ RTC0_IRQHandler
IRQ TEMP_IRQHandler
IRQ RNG_IRQHandler
IRQ ECB_IRQHandler
IRQ CCM_AAR_IRQHandler
IRQ AAR_IRQHandler
IRQ CCM_IRQHandler
IRQ WDT_IRQHandler
IRQ RTC1_IRQHandler
IRQ QDEC_IRQHandler
IRQ COMP_IRQHandler
IRQ SWI0_EGU0_IRQHandler
IRQ EGU0_IRQHandler
IRQ SWI0_IRQHandler
IRQ SWI1_EGU1_IRQHandler
IRQ EGU1_IRQHandler
IRQ SWI1_IRQHandler
IRQ SWI2_IRQHandler
IRQ SWI3_IRQHandler
IRQ SWI4_IRQHandler
IRQ SWI5_IRQHandler
IRQ PWM0_IRQHandler
IRQ PDM_IRQHandler
.size __isr_vector, .-__isr_vector

169
targets/device/nrf/nrf52811.s Normal file
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@@ -0,0 +1,169 @@
// Automatically generated file. DO NOT EDIT.
// Generated by gen-device-svd.go from nrf52811.svd, see https://github.com/NordicSemiconductor/nrfx/tree/master/mdk
/*
// nRF52811 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller
*/
// Copyright (c) 2010 - 2020, Nordic Semiconductor ASA All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice, this
// list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of Nordic Semiconductor ASA nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
.syntax unified
// This is the default handler for interrupts, if triggered but not defined.
.section .text.Default_Handler
.global Default_Handler
.type Default_Handler, %function
Default_Handler:
wfe
b Default_Handler
.size Default_Handler, .-Default_Handler
// Avoid the need for repeated .weak and .set instructions.
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
// Must set the "a" flag on the section:
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
.section .isr_vector, "a", %progbits
.global __isr_vector
__isr_vector:
// Interrupt vector as defined by Cortex-M, starting with the stack top.
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
// _stack_top and Reset_Handler.
.long _stack_top
.long Reset_Handler
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long 0
.long 0
.long 0
.long 0
.long SVC_Handler
.long DebugMon_Handler
.long 0
.long PendSV_Handler
.long SysTick_Handler
// Extra interrupts for peripherals defined by the hardware vendor.
.long POWER_CLOCK_IRQHandler
.long RADIO_IRQHandler
.long UARTE0_UART0_IRQHandler
.long TWIM0_TWIS0_TWI0_SPIM1_SPIS1_SPI1_IRQHandler
.long SPIM0_SPIS0_SPI0_IRQHandler
.long 0
.long GPIOTE_IRQHandler
.long SAADC_IRQHandler
.long TIMER0_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long RTC0_IRQHandler
.long TEMP_IRQHandler
.long RNG_IRQHandler
.long ECB_IRQHandler
.long CCM_AAR_IRQHandler
.long WDT_IRQHandler
.long RTC1_IRQHandler
.long QDEC_IRQHandler
.long COMP_IRQHandler
.long SWI0_EGU0_IRQHandler
.long SWI1_EGU1_IRQHandler
.long SWI2_IRQHandler
.long SWI3_IRQHandler
.long SWI4_IRQHandler
.long SWI5_IRQHandler
.long 0
.long 0
.long PWM0_IRQHandler
.long PDM_IRQHandler
// Define default implementations for interrupts, redirecting to
// Default_Handler when not implemented.
IRQ NMI_Handler
IRQ HardFault_Handler
IRQ MemoryManagement_Handler
IRQ BusFault_Handler
IRQ UsageFault_Handler
IRQ SVC_Handler
IRQ DebugMon_Handler
IRQ PendSV_Handler
IRQ SysTick_Handler
IRQ POWER_CLOCK_IRQHandler
IRQ CLOCK_IRQHandler
IRQ POWER_IRQHandler
IRQ RADIO_IRQHandler
IRQ UARTE0_UART0_IRQHandler
IRQ UART0_IRQHandler
IRQ UARTE0_IRQHandler
IRQ TWIM0_TWIS0_TWI0_SPIM1_SPIS1_SPI1_IRQHandler
IRQ SPI1_IRQHandler
IRQ SPIM1_IRQHandler
IRQ SPIS1_IRQHandler
IRQ TWI0_IRQHandler
IRQ TWIM0_IRQHandler
IRQ TWIS0_IRQHandler
IRQ SPIM0_SPIS0_SPI0_IRQHandler
IRQ SPI0_IRQHandler
IRQ SPIM0_IRQHandler
IRQ SPIS0_IRQHandler
IRQ GPIOTE_IRQHandler
IRQ SAADC_IRQHandler
IRQ TIMER0_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER2_IRQHandler
IRQ RTC0_IRQHandler
IRQ TEMP_IRQHandler
IRQ RNG_IRQHandler
IRQ ECB_IRQHandler
IRQ CCM_AAR_IRQHandler
IRQ AAR_IRQHandler
IRQ CCM_IRQHandler
IRQ WDT_IRQHandler
IRQ RTC1_IRQHandler
IRQ QDEC_IRQHandler
IRQ COMP_IRQHandler
IRQ SWI0_EGU0_IRQHandler
IRQ EGU0_IRQHandler
IRQ SWI0_IRQHandler
IRQ SWI1_EGU1_IRQHandler
IRQ EGU1_IRQHandler
IRQ SWI1_IRQHandler
IRQ SWI2_IRQHandler
IRQ SWI3_IRQHandler
IRQ SWI4_IRQHandler
IRQ SWI5_IRQHandler
IRQ PWM0_IRQHandler
IRQ PDM_IRQHandler
.size __isr_vector, .-__isr_vector

189
targets/device/nrf/nrf52820.s Normal file
View File

@@ -0,0 +1,189 @@
// Automatically generated file. DO NOT EDIT.
// Generated by gen-device-svd.go from nrf52820.svd, see https://github.com/NordicSemiconductor/nrfx/tree/master/mdk
/*
// nRF52833 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller
*/
// Copyright (c) 2010 - 2020, Nordic Semiconductor ASA All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice, this
// list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of Nordic Semiconductor ASA nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
.syntax unified
// This is the default handler for interrupts, if triggered but not defined.
.section .text.Default_Handler
.global Default_Handler
.type Default_Handler, %function
Default_Handler:
wfe
b Default_Handler
.size Default_Handler, .-Default_Handler
// Avoid the need for repeated .weak and .set instructions.
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
// Must set the "a" flag on the section:
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
.section .isr_vector, "a", %progbits
.global __isr_vector
__isr_vector:
// Interrupt vector as defined by Cortex-M, starting with the stack top.
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
// _stack_top and Reset_Handler.
.long _stack_top
.long Reset_Handler
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long 0
.long 0
.long 0
.long 0
.long SVC_Handler
.long DebugMon_Handler
.long 0
.long PendSV_Handler
.long SysTick_Handler
// Extra interrupts for peripherals defined by the hardware vendor.
.long POWER_CLOCK_IRQHandler
.long RADIO_IRQHandler
.long UARTE0_UART0_IRQHandler
.long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
.long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
.long 0
.long GPIOTE_IRQHandler
.long 0
.long TIMER0_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long RTC0_IRQHandler
.long TEMP_IRQHandler
.long RNG_IRQHandler
.long ECB_IRQHandler
.long CCM_AAR_IRQHandler
.long WDT_IRQHandler
.long RTC1_IRQHandler
.long QDEC_IRQHandler
.long COMP_IRQHandler
.long SWI0_EGU0_IRQHandler
.long SWI1_EGU1_IRQHandler
.long SWI2_EGU2_IRQHandler
.long SWI3_EGU3_IRQHandler
.long SWI4_EGU4_IRQHandler
.long SWI5_EGU5_IRQHandler
.long TIMER3_IRQHandler
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long USBD_IRQHandler
// Define default implementations for interrupts, redirecting to
// Default_Handler when not implemented.
IRQ NMI_Handler
IRQ HardFault_Handler
IRQ MemoryManagement_Handler
IRQ BusFault_Handler
IRQ UsageFault_Handler
IRQ SVC_Handler
IRQ DebugMon_Handler
IRQ PendSV_Handler
IRQ SysTick_Handler
IRQ POWER_CLOCK_IRQHandler
IRQ CLOCK_IRQHandler
IRQ POWER_IRQHandler
IRQ RADIO_IRQHandler
IRQ UARTE0_UART0_IRQHandler
IRQ UART0_IRQHandler
IRQ UARTE0_IRQHandler
IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
IRQ SPI0_IRQHandler
IRQ SPIM0_IRQHandler
IRQ SPIS0_IRQHandler
IRQ TWI0_IRQHandler
IRQ TWIM0_IRQHandler
IRQ TWIS0_IRQHandler
IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
IRQ SPI1_IRQHandler
IRQ SPIM1_IRQHandler
IRQ SPIS1_IRQHandler
IRQ TWI1_IRQHandler
IRQ TWIM1_IRQHandler
IRQ TWIS1_IRQHandler
IRQ GPIOTE_IRQHandler
IRQ TIMER0_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER2_IRQHandler
IRQ RTC0_IRQHandler
IRQ TEMP_IRQHandler
IRQ RNG_IRQHandler
IRQ ECB_IRQHandler
IRQ CCM_AAR_IRQHandler
IRQ AAR_IRQHandler
IRQ CCM_IRQHandler
IRQ WDT_IRQHandler
IRQ RTC1_IRQHandler
IRQ QDEC_IRQHandler
IRQ COMP_IRQHandler
IRQ SWI0_EGU0_IRQHandler
IRQ EGU0_IRQHandler
IRQ SWI0_IRQHandler
IRQ SWI1_EGU1_IRQHandler
IRQ EGU1_IRQHandler
IRQ SWI1_IRQHandler
IRQ SWI2_EGU2_IRQHandler
IRQ EGU2_IRQHandler
IRQ SWI2_IRQHandler
IRQ SWI3_EGU3_IRQHandler
IRQ EGU3_IRQHandler
IRQ SWI3_IRQHandler
IRQ SWI4_EGU4_IRQHandler
IRQ EGU4_IRQHandler
IRQ SWI4_IRQHandler
IRQ SWI5_EGU5_IRQHandler
IRQ EGU5_IRQHandler
IRQ SWI5_IRQHandler
IRQ TIMER3_IRQHandler
IRQ USBD_IRQHandler
.size __isr_vector, .-__isr_vector

217
targets/device/nrf/nrf52833.s Normal file
View File

@@ -0,0 +1,217 @@
// Automatically generated file. DO NOT EDIT.
// Generated by gen-device-svd.go from nrf52833.svd, see https://github.com/NordicSemiconductor/nrfx/tree/master/mdk
/*
// nRF52833 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller
*/
// Copyright (c) 2010 - 2020, Nordic Semiconductor ASA All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice, this
// list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of Nordic Semiconductor ASA nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
.syntax unified
// This is the default handler for interrupts, if triggered but not defined.
.section .text.Default_Handler
.global Default_Handler
.type Default_Handler, %function
Default_Handler:
wfe
b Default_Handler
.size Default_Handler, .-Default_Handler
// Avoid the need for repeated .weak and .set instructions.
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
// Must set the "a" flag on the section:
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
.section .isr_vector, "a", %progbits
.global __isr_vector
__isr_vector:
// Interrupt vector as defined by Cortex-M, starting with the stack top.
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
// _stack_top and Reset_Handler.
.long _stack_top
.long Reset_Handler
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long 0
.long 0
.long 0
.long 0
.long SVC_Handler
.long DebugMon_Handler
.long 0
.long PendSV_Handler
.long SysTick_Handler
// Extra interrupts for peripherals defined by the hardware vendor.
.long POWER_CLOCK_IRQHandler
.long RADIO_IRQHandler
.long UARTE0_UART0_IRQHandler
.long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
.long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
.long NFCT_IRQHandler
.long GPIOTE_IRQHandler
.long SAADC_IRQHandler
.long TIMER0_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long RTC0_IRQHandler
.long TEMP_IRQHandler
.long RNG_IRQHandler
.long ECB_IRQHandler
.long CCM_AAR_IRQHandler
.long WDT_IRQHandler
.long RTC1_IRQHandler
.long QDEC_IRQHandler
.long COMP_LPCOMP_IRQHandler
.long SWI0_EGU0_IRQHandler
.long SWI1_EGU1_IRQHandler
.long SWI2_EGU2_IRQHandler
.long SWI3_EGU3_IRQHandler
.long SWI4_EGU4_IRQHandler
.long SWI5_EGU5_IRQHandler
.long TIMER3_IRQHandler
.long TIMER4_IRQHandler
.long PWM0_IRQHandler
.long PDM_IRQHandler
.long 0
.long 0
.long MWU_IRQHandler
.long PWM1_IRQHandler
.long PWM2_IRQHandler
.long SPIM2_SPIS2_SPI2_IRQHandler
.long RTC2_IRQHandler
.long I2S_IRQHandler
.long FPU_IRQHandler
.long USBD_IRQHandler
.long UARTE1_IRQHandler
.long 0
.long 0
.long 0
.long 0
.long PWM3_IRQHandler
.long 0
.long SPIM3_IRQHandler
// Define default implementations for interrupts, redirecting to
// Default_Handler when not implemented.
IRQ NMI_Handler
IRQ HardFault_Handler
IRQ MemoryManagement_Handler
IRQ BusFault_Handler
IRQ UsageFault_Handler
IRQ SVC_Handler
IRQ DebugMon_Handler
IRQ PendSV_Handler
IRQ SysTick_Handler
IRQ POWER_CLOCK_IRQHandler
IRQ CLOCK_IRQHandler
IRQ POWER_IRQHandler
IRQ RADIO_IRQHandler
IRQ UARTE0_UART0_IRQHandler
IRQ UART0_IRQHandler
IRQ UARTE0_IRQHandler
IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
IRQ SPI0_IRQHandler
IRQ SPIM0_IRQHandler
IRQ SPIS0_IRQHandler
IRQ TWI0_IRQHandler
IRQ TWIM0_IRQHandler
IRQ TWIS0_IRQHandler
IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
IRQ SPI1_IRQHandler
IRQ SPIM1_IRQHandler
IRQ SPIS1_IRQHandler
IRQ TWI1_IRQHandler
IRQ TWIM1_IRQHandler
IRQ TWIS1_IRQHandler
IRQ NFCT_IRQHandler
IRQ GPIOTE_IRQHandler
IRQ SAADC_IRQHandler
IRQ TIMER0_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER2_IRQHandler
IRQ RTC0_IRQHandler
IRQ TEMP_IRQHandler
IRQ RNG_IRQHandler
IRQ ECB_IRQHandler
IRQ CCM_AAR_IRQHandler
IRQ AAR_IRQHandler
IRQ CCM_IRQHandler
IRQ WDT_IRQHandler
IRQ RTC1_IRQHandler
IRQ QDEC_IRQHandler
IRQ COMP_LPCOMP_IRQHandler
IRQ COMP_IRQHandler
IRQ LPCOMP_IRQHandler
IRQ SWI0_EGU0_IRQHandler
IRQ EGU0_IRQHandler
IRQ SWI0_IRQHandler
IRQ SWI1_EGU1_IRQHandler
IRQ EGU1_IRQHandler
IRQ SWI1_IRQHandler
IRQ SWI2_EGU2_IRQHandler
IRQ EGU2_IRQHandler
IRQ SWI2_IRQHandler
IRQ SWI3_EGU3_IRQHandler
IRQ EGU3_IRQHandler
IRQ SWI3_IRQHandler
IRQ SWI4_EGU4_IRQHandler
IRQ EGU4_IRQHandler
IRQ SWI4_IRQHandler
IRQ SWI5_EGU5_IRQHandler
IRQ EGU5_IRQHandler
IRQ SWI5_IRQHandler
IRQ TIMER3_IRQHandler
IRQ TIMER4_IRQHandler
IRQ PWM0_IRQHandler
IRQ PDM_IRQHandler
IRQ MWU_IRQHandler
IRQ PWM1_IRQHandler
IRQ PWM2_IRQHandler
IRQ SPIM2_SPIS2_SPI2_IRQHandler
IRQ SPI2_IRQHandler
IRQ SPIM2_IRQHandler
IRQ SPIS2_IRQHandler
IRQ RTC2_IRQHandler
IRQ I2S_IRQHandler
IRQ FPU_IRQHandler
IRQ USBD_IRQHandler
IRQ UARTE1_IRQHandler
IRQ PWM3_IRQHandler
IRQ SPIM3_IRQHandler
.size __isr_vector, .-__isr_vector

219
targets/device/nrf/nrf52840.s Normal file
View File

@@ -0,0 +1,219 @@
// Automatically generated file. DO NOT EDIT.
// Generated by gen-device-svd.go from nrf52840.svd, see https://github.com/NordicSemiconductor/nrfx/tree/master/mdk
/*
// nRF52840 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller
*/
// Copyright (c) 2010 - 2020, Nordic Semiconductor ASA All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice, this
// list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of Nordic Semiconductor ASA nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
.syntax unified
// This is the default handler for interrupts, if triggered but not defined.
.section .text.Default_Handler
.global Default_Handler
.type Default_Handler, %function
Default_Handler:
wfe
b Default_Handler
.size Default_Handler, .-Default_Handler
// Avoid the need for repeated .weak and .set instructions.
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
// Must set the "a" flag on the section:
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
.section .isr_vector, "a", %progbits
.global __isr_vector
__isr_vector:
// Interrupt vector as defined by Cortex-M, starting with the stack top.
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
// _stack_top and Reset_Handler.
.long _stack_top
.long Reset_Handler
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long 0
.long 0
.long 0
.long 0
.long SVC_Handler
.long DebugMon_Handler
.long 0
.long PendSV_Handler
.long SysTick_Handler
// Extra interrupts for peripherals defined by the hardware vendor.
.long POWER_CLOCK_IRQHandler
.long RADIO_IRQHandler
.long UARTE0_UART0_IRQHandler
.long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
.long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
.long NFCT_IRQHandler
.long GPIOTE_IRQHandler
.long SAADC_IRQHandler
.long TIMER0_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long RTC0_IRQHandler
.long TEMP_IRQHandler
.long RNG_IRQHandler
.long ECB_IRQHandler
.long CCM_AAR_IRQHandler
.long WDT_IRQHandler
.long RTC1_IRQHandler
.long QDEC_IRQHandler
.long COMP_LPCOMP_IRQHandler
.long SWI0_EGU0_IRQHandler
.long SWI1_EGU1_IRQHandler
.long SWI2_EGU2_IRQHandler
.long SWI3_EGU3_IRQHandler
.long SWI4_EGU4_IRQHandler
.long SWI5_EGU5_IRQHandler
.long TIMER3_IRQHandler
.long TIMER4_IRQHandler
.long PWM0_IRQHandler
.long PDM_IRQHandler
.long 0
.long 0
.long MWU_IRQHandler
.long PWM1_IRQHandler
.long PWM2_IRQHandler
.long SPIM2_SPIS2_SPI2_IRQHandler
.long RTC2_IRQHandler
.long I2S_IRQHandler
.long FPU_IRQHandler
.long USBD_IRQHandler
.long UARTE1_IRQHandler
.long QSPI_IRQHandler
.long CRYPTOCELL_IRQHandler
.long 0
.long 0
.long PWM3_IRQHandler
.long 0
.long SPIM3_IRQHandler
// Define default implementations for interrupts, redirecting to
// Default_Handler when not implemented.
IRQ NMI_Handler
IRQ HardFault_Handler
IRQ MemoryManagement_Handler
IRQ BusFault_Handler
IRQ UsageFault_Handler
IRQ SVC_Handler
IRQ DebugMon_Handler
IRQ PendSV_Handler
IRQ SysTick_Handler
IRQ POWER_CLOCK_IRQHandler
IRQ CLOCK_IRQHandler
IRQ POWER_IRQHandler
IRQ RADIO_IRQHandler
IRQ UARTE0_UART0_IRQHandler
IRQ UART0_IRQHandler
IRQ UARTE0_IRQHandler
IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
IRQ SPI0_IRQHandler
IRQ SPIM0_IRQHandler
IRQ SPIS0_IRQHandler
IRQ TWI0_IRQHandler
IRQ TWIM0_IRQHandler
IRQ TWIS0_IRQHandler
IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
IRQ SPI1_IRQHandler
IRQ SPIM1_IRQHandler
IRQ SPIS1_IRQHandler
IRQ TWI1_IRQHandler
IRQ TWIM1_IRQHandler
IRQ TWIS1_IRQHandler
IRQ NFCT_IRQHandler
IRQ GPIOTE_IRQHandler
IRQ SAADC_IRQHandler
IRQ TIMER0_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER2_IRQHandler
IRQ RTC0_IRQHandler
IRQ TEMP_IRQHandler
IRQ RNG_IRQHandler
IRQ ECB_IRQHandler
IRQ CCM_AAR_IRQHandler
IRQ AAR_IRQHandler
IRQ CCM_IRQHandler
IRQ WDT_IRQHandler
IRQ RTC1_IRQHandler
IRQ QDEC_IRQHandler
IRQ COMP_LPCOMP_IRQHandler
IRQ COMP_IRQHandler
IRQ LPCOMP_IRQHandler
IRQ SWI0_EGU0_IRQHandler
IRQ EGU0_IRQHandler
IRQ SWI0_IRQHandler
IRQ SWI1_EGU1_IRQHandler
IRQ EGU1_IRQHandler
IRQ SWI1_IRQHandler
IRQ SWI2_EGU2_IRQHandler
IRQ EGU2_IRQHandler
IRQ SWI2_IRQHandler
IRQ SWI3_EGU3_IRQHandler
IRQ EGU3_IRQHandler
IRQ SWI3_IRQHandler
IRQ SWI4_EGU4_IRQHandler
IRQ EGU4_IRQHandler
IRQ SWI4_IRQHandler
IRQ SWI5_EGU5_IRQHandler
IRQ EGU5_IRQHandler
IRQ SWI5_IRQHandler
IRQ TIMER3_IRQHandler
IRQ TIMER4_IRQHandler
IRQ PWM0_IRQHandler
IRQ PDM_IRQHandler
IRQ MWU_IRQHandler
IRQ PWM1_IRQHandler
IRQ PWM2_IRQHandler
IRQ SPIM2_SPIS2_SPI2_IRQHandler
IRQ SPI2_IRQHandler
IRQ SPIM2_IRQHandler
IRQ SPIS2_IRQHandler
IRQ RTC2_IRQHandler
IRQ I2S_IRQHandler
IRQ FPU_IRQHandler
IRQ USBD_IRQHandler
IRQ UARTE1_IRQHandler
IRQ QSPI_IRQHandler
IRQ CRYPTOCELL_IRQHandler
IRQ PWM3_IRQHandler
IRQ SPIM3_IRQHandler
.size __isr_vector, .-__isr_vector

290
targets/device/nrf/nrf5340_application.s Normal file
View File

@@ -0,0 +1,290 @@
// Automatically generated file. DO NOT EDIT.
// Generated by gen-device-svd.go from nrf5340_application.svd, see https://github.com/NordicSemiconductor/nrfx/tree/master/mdk
/*
// nRF53 reference description for system-on-chip with dual ARM 32-bit Cortex-M33 microcontrollers
*/
// Copyright (c) 2010 - 2020, Nordic Semiconductor ASA All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.syntax unified
// This is the default handler for interrupts, if triggered but not defined.
.section .text.Default_Handler
.global Default_Handler
.type Default_Handler, %function
Default_Handler:
wfe
b Default_Handler
.size Default_Handler, .-Default_Handler
// Avoid the need for repeated .weak and .set instructions.
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
// Must set the "a" flag on the section:
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
.section .isr_vector, "a", %progbits
.global __isr_vector
__isr_vector:
// Interrupt vector as defined by Cortex-M, starting with the stack top.
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
// _stack_top and Reset_Handler.
.long _stack_top
.long Reset_Handler
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long 0
.long 0
.long 0
.long 0
.long SVC_Handler
.long DebugMon_Handler
.long 0
.long PendSV_Handler
.long SysTick_Handler
// Extra interrupts for peripherals defined by the hardware vendor.
.long FPU_IRQHandler
.long CACHE_IRQHandler
.long 0
.long SPU_IRQHandler
.long 0
.long CLOCK_POWER_IRQHandler
.long 0
.long 0
.long SPIM0_SPIS0_TWIM0_TWIS0_UARTE0_IRQHandler
.long SPIM1_SPIS1_TWIM1_TWIS1_UARTE1_IRQHandler
.long SPIM4_IRQHandler
.long SPIM2_SPIS2_TWIM2_TWIS2_UARTE2_IRQHandler
.long SPIM3_SPIS3_TWIM3_TWIS3_UARTE3_IRQHandler
.long GPIOTE0_IRQHandler
.long SAADC_IRQHandler
.long TIMER0_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long 0
.long 0
.long RTC0_IRQHandler
.long RTC1_IRQHandler
.long 0
.long 0
.long WDT0_IRQHandler
.long WDT1_IRQHandler
.long COMP_LPCOMP_IRQHandler
.long EGU0_IRQHandler
.long EGU1_IRQHandler
.long EGU2_IRQHandler
.long EGU3_IRQHandler
.long EGU4_IRQHandler
.long EGU5_IRQHandler
.long PWM0_IRQHandler
.long PWM1_IRQHandler
.long PWM2_IRQHandler
.long PWM3_IRQHandler
.long 0
.long PDM0_IRQHandler
.long 0
.long I2S0_IRQHandler
.long 0
.long IPC_IRQHandler
.long QSPI_IRQHandler
.long 0
.long NFCT_IRQHandler
.long 0
.long GPIOTE1_IRQHandler
.long 0
.long 0
.long 0
.long QDEC0_IRQHandler
.long QDEC1_IRQHandler
.long 0
.long USBD_IRQHandler
.long USBREGULATOR_IRQHandler
.long 0
.long KMU_IRQHandler
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long CRYPTOCELL_IRQHandler
// Define default implementations for interrupts, redirecting to
// Default_Handler when not implemented.
IRQ NMI_Handler
IRQ HardFault_Handler
IRQ MemoryManagement_Handler
IRQ BusFault_Handler
IRQ UsageFault_Handler
IRQ SVC_Handler
IRQ DebugMon_Handler
IRQ PendSV_Handler
IRQ SysTick_Handler
IRQ FPU_IRQHandler
IRQ FPU_NS_IRQHandler
IRQ FPU_S_IRQHandler
IRQ CACHE_IRQHandler
IRQ CACHE_S_IRQHandler
IRQ SPU_IRQHandler
IRQ SPU_S_IRQHandler
IRQ CLOCK_POWER_IRQHandler
IRQ CLOCK_NS_IRQHandler
IRQ POWER_NS_IRQHandler
IRQ CLOCK_S_IRQHandler
IRQ POWER_S_IRQHandler
IRQ SPIM0_SPIS0_TWIM0_TWIS0_UARTE0_IRQHandler
IRQ SPIM0_NS_IRQHandler
IRQ SPIS0_NS_IRQHandler
IRQ TWIM0_NS_IRQHandler
IRQ TWIS0_NS_IRQHandler
IRQ UARTE0_NS_IRQHandler
IRQ SPIM0_S_IRQHandler
IRQ SPIS0_S_IRQHandler
IRQ TWIM0_S_IRQHandler
IRQ TWIS0_S_IRQHandler
IRQ UARTE0_S_IRQHandler
IRQ SPIM1_SPIS1_TWIM1_TWIS1_UARTE1_IRQHandler
IRQ SPIM1_NS_IRQHandler
IRQ SPIS1_NS_IRQHandler
IRQ TWIM1_NS_IRQHandler
IRQ TWIS1_NS_IRQHandler
IRQ UARTE1_NS_IRQHandler
IRQ SPIM1_S_IRQHandler
IRQ SPIS1_S_IRQHandler
IRQ TWIM1_S_IRQHandler
IRQ TWIS1_S_IRQHandler
IRQ UARTE1_S_IRQHandler
IRQ SPIM4_IRQHandler
IRQ SPIM4_NS_IRQHandler
IRQ SPIM4_S_IRQHandler
IRQ SPIM2_SPIS2_TWIM2_TWIS2_UARTE2_IRQHandler
IRQ SPIM2_NS_IRQHandler
IRQ SPIS2_NS_IRQHandler
IRQ TWIM2_NS_IRQHandler
IRQ TWIS2_NS_IRQHandler
IRQ UARTE2_NS_IRQHandler
IRQ SPIM2_S_IRQHandler
IRQ SPIS2_S_IRQHandler
IRQ TWIM2_S_IRQHandler
IRQ TWIS2_S_IRQHandler
IRQ UARTE2_S_IRQHandler
IRQ SPIM3_SPIS3_TWIM3_TWIS3_UARTE3_IRQHandler
IRQ SPIM3_NS_IRQHandler
IRQ SPIS3_NS_IRQHandler
IRQ TWIM3_NS_IRQHandler
IRQ TWIS3_NS_IRQHandler
IRQ UARTE3_NS_IRQHandler
IRQ SPIM3_S_IRQHandler
IRQ SPIS3_S_IRQHandler
IRQ TWIM3_S_IRQHandler
IRQ TWIS3_S_IRQHandler
IRQ UARTE3_S_IRQHandler
IRQ GPIOTE0_IRQHandler
IRQ GPIOTE0_S_IRQHandler
IRQ SAADC_IRQHandler
IRQ SAADC_NS_IRQHandler
IRQ SAADC_S_IRQHandler
IRQ TIMER0_IRQHandler
IRQ TIMER0_NS_IRQHandler
IRQ TIMER0_S_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER1_NS_IRQHandler
IRQ TIMER1_S_IRQHandler
IRQ TIMER2_IRQHandler
IRQ TIMER2_NS_IRQHandler
IRQ TIMER2_S_IRQHandler
IRQ RTC0_IRQHandler
IRQ RTC0_NS_IRQHandler
IRQ RTC0_S_IRQHandler
IRQ RTC1_IRQHandler
IRQ RTC1_NS_IRQHandler
IRQ RTC1_S_IRQHandler
IRQ WDT0_IRQHandler
IRQ WDT0_NS_IRQHandler
IRQ WDT0_S_IRQHandler
IRQ WDT1_IRQHandler
IRQ WDT1_NS_IRQHandler
IRQ WDT1_S_IRQHandler
IRQ COMP_LPCOMP_IRQHandler
IRQ COMP_NS_IRQHandler
IRQ LPCOMP_NS_IRQHandler
IRQ COMP_S_IRQHandler
IRQ LPCOMP_S_IRQHandler
IRQ EGU0_IRQHandler
IRQ EGU0_NS_IRQHandler
IRQ EGU0_S_IRQHandler
IRQ EGU1_IRQHandler
IRQ EGU1_NS_IRQHandler
IRQ EGU1_S_IRQHandler
IRQ EGU2_IRQHandler
IRQ EGU2_NS_IRQHandler
IRQ EGU2_S_IRQHandler
IRQ EGU3_IRQHandler
IRQ EGU3_NS_IRQHandler
IRQ EGU3_S_IRQHandler
IRQ EGU4_IRQHandler
IRQ EGU4_NS_IRQHandler
IRQ EGU4_S_IRQHandler
IRQ EGU5_IRQHandler
IRQ EGU5_NS_IRQHandler
IRQ EGU5_S_IRQHandler
IRQ PWM0_IRQHandler
IRQ PWM0_NS_IRQHandler
IRQ PWM0_S_IRQHandler
IRQ PWM1_IRQHandler
IRQ PWM1_NS_IRQHandler
IRQ PWM1_S_IRQHandler
IRQ PWM2_IRQHandler
IRQ PWM2_NS_IRQHandler
IRQ PWM2_S_IRQHandler
IRQ PWM3_IRQHandler
IRQ PWM3_NS_IRQHandler
IRQ PWM3_S_IRQHandler
IRQ PDM0_IRQHandler
IRQ PDM0_NS_IRQHandler
IRQ PDM0_S_IRQHandler
IRQ I2S0_IRQHandler
IRQ I2S0_NS_IRQHandler
IRQ I2S0_S_IRQHandler
IRQ IPC_IRQHandler
IRQ IPC_NS_IRQHandler
IRQ IPC_S_IRQHandler
IRQ QSPI_IRQHandler
IRQ QSPI_NS_IRQHandler
IRQ QSPI_S_IRQHandler
IRQ NFCT_IRQHandler
IRQ NFCT_NS_IRQHandler
IRQ NFCT_S_IRQHandler
IRQ GPIOTE1_IRQHandler
IRQ GPIOTE1_NS_IRQHandler
IRQ QDEC0_IRQHandler
IRQ QDEC0_NS_IRQHandler
IRQ QDEC0_S_IRQHandler
IRQ QDEC1_IRQHandler
IRQ QDEC1_NS_IRQHandler
IRQ QDEC1_S_IRQHandler
IRQ USBD_IRQHandler
IRQ USBD_NS_IRQHandler
IRQ USBD_S_IRQHandler
IRQ USBREGULATOR_IRQHandler
IRQ USBREGULATOR_NS_IRQHandler
IRQ USBREGULATOR_S_IRQHandler
IRQ KMU_IRQHandler
IRQ KMU_NS_IRQHandler
IRQ KMU_S_IRQHandler
IRQ CRYPTOCELL_IRQHandler
IRQ CRYPTOCELL_S_IRQHandler
.size __isr_vector, .-__isr_vector

143
targets/device/nrf/nrf5340_network.s Normal file
View File

@@ -0,0 +1,143 @@
// Automatically generated file. DO NOT EDIT.
// Generated by gen-device-svd.go from nrf5340_network.svd, see https://github.com/NordicSemiconductor/nrfx/tree/master/mdk
/*
// nRF53 reference description for system-on-chip with dual ARM 32-bit Cortex-M33 microcontrollers
*/
// Copyright (c) 2010 - 2020, Nordic Semiconductor ASA All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.syntax unified
// This is the default handler for interrupts, if triggered but not defined.
.section .text.Default_Handler
.global Default_Handler
.type Default_Handler, %function
Default_Handler:
wfe
b Default_Handler
.size Default_Handler, .-Default_Handler
// Avoid the need for repeated .weak and .set instructions.
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
// Must set the "a" flag on the section:
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
.section .isr_vector, "a", %progbits
.global __isr_vector
__isr_vector:
// Interrupt vector as defined by Cortex-M, starting with the stack top.
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
// _stack_top and Reset_Handler.
.long _stack_top
.long Reset_Handler
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long 0
.long 0
.long 0
.long 0
.long SVC_Handler
.long DebugMon_Handler
.long 0
.long PendSV_Handler
.long SysTick_Handler
// Extra interrupts for peripherals defined by the hardware vendor.
.long 0
.long 0
.long 0
.long 0
.long 0
.long CLOCK_POWER_IRQHandler
.long 0
.long 0
.long RADIO_IRQHandler
.long RNG_IRQHandler
.long GPIOTE_IRQHandler
.long WDT_IRQHandler
.long TIMER0_IRQHandler
.long ECB_IRQHandler
.long AAR_CCM_IRQHandler
.long 0
.long TEMP_IRQHandler
.long RTC0_IRQHandler
.long IPC_IRQHandler
.long SPIM0_SPIS0_TWIM0_TWIS0_UARTE0_IRQHandler
.long EGU0_IRQHandler
.long 0
.long RTC1_IRQHandler
.long 0
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long SWI0_IRQHandler
.long SWI1_IRQHandler
.long SWI2_IRQHandler
.long SWI3_IRQHandler
// Define default implementations for interrupts, redirecting to
// Default_Handler when not implemented.
IRQ NMI_Handler
IRQ HardFault_Handler
IRQ MemoryManagement_Handler
IRQ BusFault_Handler
IRQ UsageFault_Handler
IRQ SVC_Handler
IRQ DebugMon_Handler
IRQ PendSV_Handler
IRQ SysTick_Handler
IRQ CLOCK_POWER_IRQHandler
IRQ CLOCK_NS_IRQHandler
IRQ POWER_NS_IRQHandler
IRQ RADIO_IRQHandler
IRQ RADIO_NS_IRQHandler
IRQ RNG_IRQHandler
IRQ RNG_NS_IRQHandler
IRQ GPIOTE_IRQHandler
IRQ GPIOTE_NS_IRQHandler
IRQ WDT_IRQHandler
IRQ WDT_NS_IRQHandler
IRQ TIMER0_IRQHandler
IRQ TIMER0_NS_IRQHandler
IRQ ECB_IRQHandler
IRQ ECB_NS_IRQHandler
IRQ AAR_CCM_IRQHandler
IRQ AAR_NS_IRQHandler
IRQ CCM_NS_IRQHandler
IRQ TEMP_IRQHandler
IRQ TEMP_NS_IRQHandler
IRQ RTC0_IRQHandler
IRQ RTC0_NS_IRQHandler
IRQ IPC_IRQHandler
IRQ IPC_NS_IRQHandler
IRQ SPIM0_SPIS0_TWIM0_TWIS0_UARTE0_IRQHandler
IRQ SPIM0_NS_IRQHandler
IRQ SPIS0_NS_IRQHandler
IRQ TWIM0_NS_IRQHandler
IRQ TWIS0_NS_IRQHandler
IRQ UARTE0_NS_IRQHandler
IRQ EGU0_IRQHandler
IRQ EGU0_NS_IRQHandler
IRQ RTC1_IRQHandler
IRQ RTC1_NS_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER1_NS_IRQHandler
IRQ TIMER2_IRQHandler
IRQ TIMER2_NS_IRQHandler
IRQ SWI0_IRQHandler
IRQ SWI0_NS_IRQHandler
IRQ SWI1_IRQHandler
IRQ SWI1_NS_IRQHandler
IRQ SWI2_IRQHandler
IRQ SWI2_NS_IRQHandler
IRQ SWI3_IRQHandler
IRQ SWI3_NS_IRQHandler
.size __isr_vector, .-__isr_vector

281
targets/device/nrf/nrf9160.s Normal file
View File

@@ -0,0 +1,281 @@
// Automatically generated file. DO NOT EDIT.
// Generated by gen-device-svd.go from nrf9160.svd, see https://github.com/NordicSemiconductor/nrfx/tree/master/mdk
/*
// nrf9160 reference description for radio MCU with ARM 32-bit Cortex-M33 Microcontroller
*/
// Copyright (c) 2010 - 2020, Nordic Semiconductor ASA All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice, this
// list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. Neither the name of Nordic Semiconductor ASA nor the names of its
// contributors may be used to endorse or promote products derived from this
// software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
// IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
// ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
// POSSIBILITY OF SUCH DAMAGE.
.syntax unified
// This is the default handler for interrupts, if triggered but not defined.
.section .text.Default_Handler
.global Default_Handler
.type Default_Handler, %function
Default_Handler:
wfe
b Default_Handler
.size Default_Handler, .-Default_Handler
// Avoid the need for repeated .weak and .set instructions.
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
// Must set the "a" flag on the section:
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
.section .isr_vector, "a", %progbits
.global __isr_vector
__isr_vector:
// Interrupt vector as defined by Cortex-M, starting with the stack top.
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
// _stack_top and Reset_Handler.
.long _stack_top
.long Reset_Handler
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long 0
.long 0
.long 0
.long 0
.long SVC_Handler
.long DebugMon_Handler
.long 0
.long PendSV_Handler
.long SysTick_Handler
// Extra interrupts for peripherals defined by the hardware vendor.
.long 0
.long 0
.long 0
.long SPU_IRQHandler
.long 0
.long CLOCK_POWER_IRQHandler
.long 0
.long 0
.long UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler
.long UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler
.long UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler
.long UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler
.long 0
.long GPIOTE0_IRQHandler
.long SAADC_IRQHandler
.long TIMER0_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long 0
.long 0
.long RTC0_IRQHandler
.long RTC1_IRQHandler
.long 0
.long 0
.long WDT_IRQHandler
.long 0
.long 0
.long EGU0_IRQHandler
.long EGU1_IRQHandler
.long EGU2_IRQHandler
.long EGU3_IRQHandler
.long EGU4_IRQHandler
.long EGU5_IRQHandler
.long PWM0_IRQHandler
.long PWM1_IRQHandler
.long PWM2_IRQHandler
.long PWM3_IRQHandler
.long 0
.long PDM_IRQHandler
.long 0
.long I2S_IRQHandler
.long 0
.long IPC_IRQHandler
.long 0
.long FPU_IRQHandler
.long 0
.long 0
.long 0
.long 0
.long GPIOTE1_IRQHandler
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long KMU_IRQHandler
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long CRYPTOCELL_IRQHandler
// Define default implementations for interrupts, redirecting to
// Default_Handler when not implemented.
IRQ NMI_Handler
IRQ HardFault_Handler
IRQ MemoryManagement_Handler
IRQ BusFault_Handler
IRQ UsageFault_Handler
IRQ SVC_Handler
IRQ DebugMon_Handler
IRQ PendSV_Handler
IRQ SysTick_Handler
IRQ SPU_IRQHandler
IRQ SPU_S_IRQHandler
IRQ CLOCK_POWER_IRQHandler
IRQ CLOCK_NS_IRQHandler
IRQ POWER_NS_IRQHandler
IRQ CLOCK_S_IRQHandler
IRQ POWER_S_IRQHandler
IRQ UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler
IRQ SPIM0_NS_IRQHandler
IRQ SPIS0_NS_IRQHandler
IRQ TWIM0_NS_IRQHandler
IRQ TWIS0_NS_IRQHandler
IRQ UARTE0_NS_IRQHandler
IRQ SPIM0_S_IRQHandler
IRQ SPIS0_S_IRQHandler
IRQ TWIM0_S_IRQHandler
IRQ TWIS0_S_IRQHandler
IRQ UARTE0_S_IRQHandler
IRQ UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler
IRQ SPIM1_NS_IRQHandler
IRQ SPIS1_NS_IRQHandler
IRQ TWIM1_NS_IRQHandler
IRQ TWIS1_NS_IRQHandler
IRQ UARTE1_NS_IRQHandler
IRQ SPIM1_S_IRQHandler
IRQ SPIS1_S_IRQHandler
IRQ TWIM1_S_IRQHandler
IRQ TWIS1_S_IRQHandler
IRQ UARTE1_S_IRQHandler
IRQ UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler
IRQ SPIM2_NS_IRQHandler
IRQ SPIS2_NS_IRQHandler
IRQ TWIM2_NS_IRQHandler
IRQ TWIS2_NS_IRQHandler
IRQ UARTE2_NS_IRQHandler
IRQ SPIM2_S_IRQHandler
IRQ SPIS2_S_IRQHandler
IRQ TWIM2_S_IRQHandler
IRQ TWIS2_S_IRQHandler
IRQ UARTE2_S_IRQHandler
IRQ UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler
IRQ SPIM3_NS_IRQHandler
IRQ SPIS3_NS_IRQHandler
IRQ TWIM3_NS_IRQHandler
IRQ TWIS3_NS_IRQHandler
IRQ UARTE3_NS_IRQHandler
IRQ SPIM3_S_IRQHandler
IRQ SPIS3_S_IRQHandler
IRQ TWIM3_S_IRQHandler
IRQ TWIS3_S_IRQHandler
IRQ UARTE3_S_IRQHandler
IRQ GPIOTE0_IRQHandler
IRQ GPIOTE0_S_IRQHandler
IRQ SAADC_IRQHandler
IRQ SAADC_NS_IRQHandler
IRQ SAADC_S_IRQHandler
IRQ TIMER0_IRQHandler
IRQ TIMER0_NS_IRQHandler
IRQ TIMER0_S_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER1_NS_IRQHandler
IRQ TIMER1_S_IRQHandler
IRQ TIMER2_IRQHandler
IRQ TIMER2_NS_IRQHandler
IRQ TIMER2_S_IRQHandler
IRQ RTC0_IRQHandler
IRQ RTC0_NS_IRQHandler
IRQ RTC0_S_IRQHandler
IRQ RTC1_IRQHandler
IRQ RTC1_NS_IRQHandler
IRQ RTC1_S_IRQHandler
IRQ WDT_IRQHandler
IRQ WDT_NS_IRQHandler
IRQ WDT_S_IRQHandler
IRQ EGU0_IRQHandler
IRQ EGU0_NS_IRQHandler
IRQ EGU0_S_IRQHandler
IRQ EGU1_IRQHandler
IRQ EGU1_NS_IRQHandler
IRQ EGU1_S_IRQHandler
IRQ EGU2_IRQHandler
IRQ EGU2_NS_IRQHandler
IRQ EGU2_S_IRQHandler
IRQ EGU3_IRQHandler
IRQ EGU3_NS_IRQHandler
IRQ EGU3_S_IRQHandler
IRQ EGU4_IRQHandler
IRQ EGU4_NS_IRQHandler
IRQ EGU4_S_IRQHandler
IRQ EGU5_IRQHandler
IRQ EGU5_NS_IRQHandler
IRQ EGU5_S_IRQHandler
IRQ PWM0_IRQHandler
IRQ PWM0_NS_IRQHandler
IRQ PWM0_S_IRQHandler
IRQ PWM1_IRQHandler
IRQ PWM1_NS_IRQHandler
IRQ PWM1_S_IRQHandler
IRQ PWM2_IRQHandler
IRQ PWM2_NS_IRQHandler
IRQ PWM2_S_IRQHandler
IRQ PWM3_IRQHandler
IRQ PWM3_NS_IRQHandler
IRQ PWM3_S_IRQHandler
IRQ PDM_IRQHandler
IRQ PDM_NS_IRQHandler
IRQ PDM_S_IRQHandler
IRQ I2S_IRQHandler
IRQ I2S_NS_IRQHandler
IRQ I2S_S_IRQHandler
IRQ IPC_IRQHandler
IRQ IPC_NS_IRQHandler
IRQ IPC_S_IRQHandler
IRQ FPU_IRQHandler
IRQ FPU_NS_IRQHandler
IRQ FPU_S_IRQHandler
IRQ GPIOTE1_IRQHandler
IRQ GPIOTE1_NS_IRQHandler
IRQ KMU_IRQHandler
IRQ KMU_NS_IRQHandler
IRQ KMU_S_IRQHandler
IRQ CRYPTOCELL_IRQHandler
IRQ CRYPTOCELL_S_IRQHandler
.size __isr_vector, .-__isr_vector