feat: implement target configuration system for issue #1176

Add comprehensive target configuration parsing and inheritance system:

- Create internal/targets package with config structures
- Support JSON configuration loading with inheritance resolution
- Implement multi-level inheritance (e.g., rp2040 → cortex-m0plus → cortex-m)
- Add 206 target configurations from TinyGo for embedded platforms
- Support core fields: name, llvm-target, cpu, features, build-tags, goos, goarch, cflags, ldflags
- Provide high-level resolver interface for target lookup
- Include comprehensive unit tests with 100% target parsing coverage

This foundation enables future -target parameter support for cross-compilation
to diverse embedded platforms beyond current GOOS/GOARCH limitations.

🤖 Generated with [Claude Code](https://claude.ai/code)

Co-Authored-By: Claude <noreply@anthropic.com>
This commit is contained in:
Li Jie
2025-07-26 10:49:35 +10:00
parent 5eb833a984
commit b80a54eb0f
277 changed files with 8202 additions and 0 deletions

16
targets/riscv-qemu.ld Normal file
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/* Memory map:
* https://github.com/qemu/qemu/blob/master/hw/riscv/virt.c
* Looks like we can use any address starting from 0x80000000 (so 2GB of space).
* However, using a large space slows down tests.
*/
MEMORY
{
RAM (rwx) : ORIGIN = 0x80000000, LENGTH = 100M
}
REGION_ALIAS("FLASH_TEXT", RAM)
_stack_size = 2K;
INCLUDE "targets/riscv.ld"