282 lines
8.1 KiB
ArmAsm
282 lines
8.1 KiB
ArmAsm
// Automatically generated file. DO NOT EDIT.
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// Generated by gen-device-svd.go from nrf9160.svd, see https://github.com/NordicSemiconductor/nrfx/tree/master/mdk
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/*
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// nrf9160 reference description for radio MCU with ARM 32-bit Cortex-M33 Microcontroller
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*/
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// Copyright (c) 2010 - 2020, Nordic Semiconductor ASA All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice, this
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// list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of Nordic Semiconductor ASA nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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.syntax unified
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// This is the default handler for interrupts, if triggered but not defined.
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.section .text.Default_Handler
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.global Default_Handler
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.type Default_Handler, %function
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Default_Handler:
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wfe
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b Default_Handler
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.size Default_Handler, .-Default_Handler
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// Avoid the need for repeated .weak and .set instructions.
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.macro IRQ handler
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.weak \handler
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.set \handler, Default_Handler
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.endm
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// Must set the "a" flag on the section:
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// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
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// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
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.section .isr_vector, "a", %progbits
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.global __isr_vector
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__isr_vector:
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// Interrupt vector as defined by Cortex-M, starting with the stack top.
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// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
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// _stack_top and Reset_Handler.
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.long _stack_top
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.long Reset_Handler
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.long NMI_Handler
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.long HardFault_Handler
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.long MemoryManagement_Handler
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.long BusFault_Handler
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.long UsageFault_Handler
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.long 0
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.long 0
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.long 0
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.long 0
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.long SVC_Handler
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.long DebugMon_Handler
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.long 0
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.long PendSV_Handler
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.long SysTick_Handler
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// Extra interrupts for peripherals defined by the hardware vendor.
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.long 0
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.long 0
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.long 0
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.long SPU_IRQHandler
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.long 0
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.long CLOCK_POWER_IRQHandler
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.long 0
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.long 0
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.long UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler
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.long UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler
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.long UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler
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.long UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler
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.long 0
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.long GPIOTE0_IRQHandler
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.long SAADC_IRQHandler
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.long TIMER0_IRQHandler
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.long TIMER1_IRQHandler
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.long TIMER2_IRQHandler
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.long 0
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.long 0
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.long RTC0_IRQHandler
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.long RTC1_IRQHandler
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.long 0
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.long 0
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.long WDT_IRQHandler
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.long 0
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.long 0
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.long EGU0_IRQHandler
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.long EGU1_IRQHandler
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.long EGU2_IRQHandler
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.long EGU3_IRQHandler
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.long EGU4_IRQHandler
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.long EGU5_IRQHandler
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.long PWM0_IRQHandler
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.long PWM1_IRQHandler
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.long PWM2_IRQHandler
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.long PWM3_IRQHandler
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.long 0
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.long PDM_IRQHandler
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.long 0
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.long I2S_IRQHandler
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.long 0
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.long IPC_IRQHandler
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.long 0
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.long FPU_IRQHandler
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.long 0
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.long 0
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.long 0
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.long 0
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.long GPIOTE1_IRQHandler
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.long 0
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.long 0
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.long 0
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.long 0
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.long 0
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.long 0
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.long 0
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.long KMU_IRQHandler
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.long 0
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.long 0
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.long 0
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.long 0
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.long 0
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.long 0
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.long CRYPTOCELL_IRQHandler
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// Define default implementations for interrupts, redirecting to
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// Default_Handler when not implemented.
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IRQ NMI_Handler
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IRQ HardFault_Handler
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IRQ MemoryManagement_Handler
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IRQ BusFault_Handler
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IRQ UsageFault_Handler
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IRQ SVC_Handler
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IRQ DebugMon_Handler
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IRQ PendSV_Handler
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IRQ SysTick_Handler
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IRQ SPU_IRQHandler
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IRQ SPU_S_IRQHandler
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IRQ CLOCK_POWER_IRQHandler
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IRQ CLOCK_NS_IRQHandler
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IRQ POWER_NS_IRQHandler
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IRQ CLOCK_S_IRQHandler
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IRQ POWER_S_IRQHandler
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IRQ UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler
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IRQ SPIM0_NS_IRQHandler
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IRQ SPIS0_NS_IRQHandler
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IRQ TWIM0_NS_IRQHandler
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IRQ TWIS0_NS_IRQHandler
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IRQ UARTE0_NS_IRQHandler
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IRQ SPIM0_S_IRQHandler
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IRQ SPIS0_S_IRQHandler
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IRQ TWIM0_S_IRQHandler
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IRQ TWIS0_S_IRQHandler
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IRQ UARTE0_S_IRQHandler
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IRQ UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler
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IRQ SPIM1_NS_IRQHandler
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IRQ SPIS1_NS_IRQHandler
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IRQ TWIM1_NS_IRQHandler
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IRQ TWIS1_NS_IRQHandler
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IRQ UARTE1_NS_IRQHandler
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IRQ SPIM1_S_IRQHandler
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IRQ SPIS1_S_IRQHandler
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IRQ TWIM1_S_IRQHandler
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IRQ TWIS1_S_IRQHandler
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IRQ UARTE1_S_IRQHandler
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IRQ UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler
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IRQ SPIM2_NS_IRQHandler
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IRQ SPIS2_NS_IRQHandler
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IRQ TWIM2_NS_IRQHandler
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IRQ TWIS2_NS_IRQHandler
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IRQ UARTE2_NS_IRQHandler
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IRQ SPIM2_S_IRQHandler
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IRQ SPIS2_S_IRQHandler
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IRQ TWIM2_S_IRQHandler
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IRQ TWIS2_S_IRQHandler
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IRQ UARTE2_S_IRQHandler
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IRQ UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler
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IRQ SPIM3_NS_IRQHandler
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IRQ SPIS3_NS_IRQHandler
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IRQ TWIM3_NS_IRQHandler
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IRQ TWIS3_NS_IRQHandler
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IRQ UARTE3_NS_IRQHandler
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IRQ SPIM3_S_IRQHandler
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IRQ SPIS3_S_IRQHandler
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IRQ TWIM3_S_IRQHandler
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IRQ TWIS3_S_IRQHandler
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IRQ UARTE3_S_IRQHandler
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IRQ GPIOTE0_IRQHandler
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IRQ GPIOTE0_S_IRQHandler
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IRQ SAADC_IRQHandler
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IRQ SAADC_NS_IRQHandler
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IRQ SAADC_S_IRQHandler
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IRQ TIMER0_IRQHandler
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IRQ TIMER0_NS_IRQHandler
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IRQ TIMER0_S_IRQHandler
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IRQ TIMER1_IRQHandler
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IRQ TIMER1_NS_IRQHandler
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IRQ TIMER1_S_IRQHandler
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IRQ TIMER2_IRQHandler
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IRQ TIMER2_NS_IRQHandler
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IRQ TIMER2_S_IRQHandler
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IRQ RTC0_IRQHandler
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IRQ RTC0_NS_IRQHandler
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IRQ RTC0_S_IRQHandler
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IRQ RTC1_IRQHandler
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IRQ RTC1_NS_IRQHandler
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IRQ RTC1_S_IRQHandler
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IRQ WDT_IRQHandler
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IRQ WDT_NS_IRQHandler
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IRQ WDT_S_IRQHandler
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IRQ EGU0_IRQHandler
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IRQ EGU0_NS_IRQHandler
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IRQ EGU0_S_IRQHandler
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IRQ EGU1_IRQHandler
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IRQ EGU1_NS_IRQHandler
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IRQ EGU1_S_IRQHandler
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IRQ EGU2_IRQHandler
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IRQ EGU2_NS_IRQHandler
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IRQ EGU2_S_IRQHandler
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IRQ EGU3_IRQHandler
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IRQ EGU3_NS_IRQHandler
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IRQ EGU3_S_IRQHandler
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IRQ EGU4_IRQHandler
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IRQ EGU4_NS_IRQHandler
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IRQ EGU4_S_IRQHandler
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IRQ EGU5_IRQHandler
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IRQ EGU5_NS_IRQHandler
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IRQ EGU5_S_IRQHandler
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IRQ PWM0_IRQHandler
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IRQ PWM0_NS_IRQHandler
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IRQ PWM0_S_IRQHandler
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IRQ PWM1_IRQHandler
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IRQ PWM1_NS_IRQHandler
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IRQ PWM1_S_IRQHandler
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IRQ PWM2_IRQHandler
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IRQ PWM2_NS_IRQHandler
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IRQ PWM2_S_IRQHandler
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IRQ PWM3_IRQHandler
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IRQ PWM3_NS_IRQHandler
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IRQ PWM3_S_IRQHandler
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IRQ PDM_IRQHandler
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IRQ PDM_NS_IRQHandler
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IRQ PDM_S_IRQHandler
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IRQ I2S_IRQHandler
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IRQ I2S_NS_IRQHandler
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IRQ I2S_S_IRQHandler
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IRQ IPC_IRQHandler
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IRQ IPC_NS_IRQHandler
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IRQ IPC_S_IRQHandler
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IRQ FPU_IRQHandler
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IRQ FPU_NS_IRQHandler
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IRQ FPU_S_IRQHandler
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IRQ GPIOTE1_IRQHandler
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IRQ GPIOTE1_NS_IRQHandler
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IRQ KMU_IRQHandler
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IRQ KMU_NS_IRQHandler
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IRQ KMU_S_IRQHandler
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IRQ CRYPTOCELL_IRQHandler
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IRQ CRYPTOCELL_S_IRQHandler
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.size __isr_vector, .-__isr_vector
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